Interrupts: Difference between revisions
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The purpose of this page is to document how Xen set up and uses interrupts. It is a work in progress, and to a certain extent dynamic as patches modify the code. However, the contents of it is accurate of 14/11/2011 |
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== IDT vector entries == |
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Refer to <code>xen/include/asm-x86/mach-default/irq_vectors.h</code> |
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=== Vector Ranges === |
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{| cellpadding="2" cellspacing="0" |
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|| '''Section''' || '''Range''' || '''Use''' |
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|- |
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|| Exceptions || <code>0x00 - 0x1f</code> || Architecturally reserved |
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|- |
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|| Dynamic IRQs || <code>0x20 - 0xdf</code> || Free for assignment for devices |
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|| Legacy || <code>0xe0 - 0xef</code> || Reserved range for PIC before switching to APIC |
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|| High Priority || <code>0xf0 - 0xff</code> || For IPIs and serial interrupts |
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|} |
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=== Specific Vectors === |
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{| cellpadding="2" cellspacing="0" |
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|| '''Vector''' || '''Symbol''' || '''Description''' |
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|| <code>0x20</code> || <code>IRQ_MOVE_CLEANUP_VECTOR</code> || Clean up references to IRQs in past PCPUs after they have been moved |
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|| <code>0x80</code> || <code>LEGACY_SYSCALL_VECTOR</code> |
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|| <code>0x82</code> || <code>HYPERCALL_VECTOR</code> |
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|| <code>0xf7</code> || <code>CMCI_APIC_VECTOR</code> |
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|| <code>0xf8</code> || <code>PMU_APIC_VECTOR</code> |
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|| <code>0xf9</code> || <code>LOCAL_TIMER_VECTOR</code> |
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|| <code>0xfa</code> || <code>THERMAL_APIC_VECTOR</code> |
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|| <code>0xfb</code> || <code>CALL_FUNCTION_VECTOR</code> |
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|| <code>0xfc</code> || <code>EVENT_CHECK_VECTOR</code> |
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|| <code>0xfd</code> || <code>INVALIDATE_TLB_VECTOR</code> |
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|| <code>0xfe</code> || <code>ERROR_APIC_VECTOR</code> |
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|| <code>0xff</code> || <code>SPURIOUS_APIC_VECTOR</code> |
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|} |
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Revision as of 18:30, 14 November 2011
The purpose of this page is to document how Xen set up and uses interrupts. It is a work in progress, and to a certain extent dynamic as patches modify the code. However, the contents of it is accurate of 14/11/2011
IDT vector entries
Refer to xen/include/asm-x86/mach-default/irq_vectors.h
Vector Ranges
| Section | Range | Use |
| Exceptions | 0x00 - 0x1f |
Architecturally reserved |
| Dynamic IRQs | 0x20 - 0xdf |
Free for assignment for devices |
| Legacy | 0xe0 - 0xef |
Reserved range for PIC before switching to APIC |
| High Priority | 0xf0 - 0xff |
For IPIs and serial interrupts |
Specific Vectors
| Vector | Symbol | Description |
0x20 |
IRQ_MOVE_CLEANUP_VECTOR |
Clean up references to IRQs in past PCPUs after they have been moved |
0x80 |
LEGACY_SYSCALL_VECTOR
| |
0x82 |
HYPERCALL_VECTOR
| |
0xf7 |
CMCI_APIC_VECTOR
| |
0xf8 |
PMU_APIC_VECTOR
| |
0xf9 |
LOCAL_TIMER_VECTOR
| |
0xfa |
THERMAL_APIC_VECTOR
| |
0xfb |
CALL_FUNCTION_VECTOR
| |
0xfc |
EVENT_CHECK_VECTOR
| |
0xfd |
INVALIDATE_TLB_VECTOR
| |
0xfe |
ERROR_APIC_VECTOR
| |
0xff |
SPURIOUS_APIC_VECTOR
|
