Xen Project 4.18 Feature List: Difference between revisions

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(Created page with "= Notable Features = This release has seen the increase in hardware support for both x86 and Arm, together with the addition of other improvements and features: * ARM: The S...")
 
 
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* x86: CPUID_USER_DIS (CPUID Faulting) used by Xen to control PV guest's view of CPUID data.
* x86: CPUID_USER_DIS (CPUID Faulting) used by Xen to control PV guest's view of CPUID data.
* x86: Support for features new in Intel Sapphire Rapids CPUs:
* x86: Support for features new in Intel Sapphire Rapids CPUs:
* PKS (Protection Key Supervisor) available to HVM/PVH guests
** PKS (Protection Key Supervisor) available to HVM/PVH guests
* VM-Notify used by Xen to mitigate certain micro-architectural pipeline livelocks, instead of crashing the entire server
** VM-Notify used by Xen to mitigate certain micro-architectural pipeline livelocks, instead of crashing the entire server
* Bus-lock detection, used by Xen to mitigate (by rate-limiting) the systemwide impact of a guest misusing atomic instructions
** Bus-lock detection, used by Xen to mitigate (by rate-limiting) the systemwide impact of a guest misusing atomic instructions
* x86: Support for features new in Intel Granite Rapids CPUs: AVX512-FP16
* x86: Support for features new in Intel Granite Rapids CPUs: AVX512-FP16
* x86: Add Intel Hardware P-States (HWP) cpufreq driver
* x86: Add Intel Hardware P-States (HWP) cpufreq driver

Latest revision as of 11:29, 17 November 2023

Notable Features

This release has seen the increase in hardware support for both x86 and Arm, together with the addition of other improvements and features:

  • ARM: The Scalable Vector Extension (SVE) is now merged in upstream Xen as a tech preview.
  • ARM: The Arm Firmware Framework for Arm A-profile (FF-A) framework support is now merged in upstream Xen as a tech preview.
  • ARM: The memory subsystem in Xen on Arm64 is now more compliant with the Arm Arm.

x86

  • x86: On all Intel systems, MSR_ARCH_CAPS is now visible in guests, and controllable from the VM's config file. For CPUs from ~2019 onwards, this allows guest kernels to see details about hardware fixes for speculative mitigations.
  • x86: Support for features new in AMD Genoa CPUs:
  • x86: CPUID_USER_DIS (CPUID Faulting) used by Xen to control PV guest's view of CPUID data.
  • x86: Support for features new in Intel Sapphire Rapids CPUs:
    • PKS (Protection Key Supervisor) available to HVM/PVH guests
    • VM-Notify used by Xen to mitigate certain micro-architectural pipeline livelocks, instead of crashing the entire server
    • Bus-lock detection, used by Xen to mitigate (by rate-limiting) the systemwide impact of a guest misusing atomic instructions
  • x86: Support for features new in Intel Granite Rapids CPUs: AVX512-FP16
  • x86: Add Intel Hardware P-States (HWP) cpufreq driver
  • x86: Support for enforcing system-wide operation in Data Operand Independent Timing Mode
  • Initial RISC-V port, with Gitlab-CI doing "Early printk" (i.e., "Hello world" implementation)
  • Initial Power port, with Gitlab-CI doing "Early printk" (i.e., "Hello world" implementation)
  • The project has officially adopted more MISRA-C rules, from four directives and 24 rules in 4.17 to 6 directives and 65 rules of MISRA-C
  • xl/libxl can customize SMBIOS strings for HVM guests
  • On Arm, experimental support for dynamic addition/removal of Xen device tree nodes using a device tree overlay binary (.dtbo)
  • Introduced two new hypercalls to map the vCPU runstate and time areas by physical rather than linear/virtual addresses

Ongoing activities

The Xen community has several interesting initiatives, where work is ongoing and is expected to bear fruit in forthcoming releases. Some of the highlights:

ARM MPU and vPCI

On Arm, the upstream MPU (memory protection unit) support and PCI-passthrough work is ongoing, including some refactoring and improvements of the existing code. Both works will be included in the next few releases.

RISC-V

On RISC-V, some refactoring and improvements of the existing code have been done. BUG/WARN macros, temporary printk, and decode_cause() functions to print the reason for a trap have been introduced. In the next few releases, identity mapping, full Xen build, and trap handling will be introduced.

POWER

On PowerPC, initial support for the ppc64le architecture was added to Xen, specifically targeting Power ISA 3.0B and later. As of 4.18, an early-stage Xen image can be built that boots on bare metal PowerNV systems. Current ongoing work focuses on handling printing to the OPAL serial console, as well as some basic Radix MMU page table initialization.