FuSa SIG/Status

Scope Definition

• Hardware
  • Only platform core code (no driver)
    • timer, mmu, irq controller
  • board/platform specific code to be done by user of Xen at this stage
  • PCI passthrough out of scope (for now)

• System configuration
  • dom0less
  • Mixed criticality (a certifiable VM and a non-certifiable VM)

Ongoing Efforts

• Requirements format (doxygen)

• Misra requirement classification
  • table of requirements followed/to be followed/not applicable
  • doorstop (links requirements to code)
  • Zephyr solution (originally by Intel) based on doxygen

• static code analysis (cppcheck, Coverity, Eclair)
  • goal: Misra code compliance

• Real-time and interference reduction
  • real time analysis of Xen
    • interrupt forward response time
  • cache coloring

• commit review tracing
  • get info from mailing list archive

• static system definition
  • static memory allocation
  • static heap allocation
  • cpupools