FuSa SIG/Status: Difference between revisions

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= Scope Definition =
= Scope Definition =
* Hardware
* Hardware
** Platform core components (no platform drivers): timer, mmu, iommu, irq controller
** Only platform core code (no driver)
*** timer, mmu, irq controller
** board/platform specific code to be done by user of Xen at this stage
** PCI passthrough out of scope (for now)


* System configuration
* System configuration
** dom0less
** Dom0less
** Mixed criticality (a certifiable VM and a non-certifiable VM)
** Mixed criticality: a certifiable VM and a non-certifiable VM


= Ongoing Efforts =
= Ongoing Efforts =


* Requirements format (doxygen)
* Requirements and documentation
** Doxygen for documentation of internal and external interfaces
** Doorstop to link documentation and requirements to code
** Zephyr solution (originally by Intel) based on Doxygen
** In Progress: conversion of hypercalls docs to Doxygen format


* MISRA C
* Misra requirement classification
** MISRA C Working Group established
** table of requirements followed/to be followed/not applicable
** MISRA C Working Group is evaluating MISRA C rules and accepting them into the Xen coding style.
** doorstop (links requirements to code)
** [https://gitlab.com/xen-project/xen/-/blob/staging/docs/misra/rules.rst|MISRA C rules officially accepted in Xen]
** Zephyr solution (originally by Intel) based on doxygen
** cppcheck available to detect violations, see *make cppcheck* and *make cppcheck-html*
** In Progress: violations reduction and MISRA C rules acceptance


* Static System Definition
* static code analysis (cppcheck, Coverity, Eclair)
** goal: Misra code compliance
** Static memory allocation
** Static heap allocation
** Static cpupools
** Done: cpupools
** In Progress: memory and heap allocation


* Real-time and interference reduction
* Determinism and interference reduction
** real time analysis of Xen
** Interrupt latency analysis in Xen
** Cache Coloring
*** interrupt forward response time
** In Progress: Cache Coloring upstreaming
** cache coloring


* Traceability
* commit review tracing
** Trace review comments and patch versions all the way to a commit
** get info from mailing list archive
** Status: script prototype available to retrieve all mailing list discussions from a commit id


* static system definition
** static memory allocation
** static heap allocation
** cpupools


[[Category:Safety Certification/FuSa SIG]]
[[Category:Safety Certification/FuSa SIG]]

Latest revision as of 22:21, 11 August 2022

Scope Definition

  • Hardware
    • Platform core components (no platform drivers): timer, mmu, iommu, irq controller
  • System configuration
    • Dom0less
    • Mixed criticality: a certifiable VM and a non-certifiable VM

Ongoing Efforts

  • Requirements and documentation
    • Doxygen for documentation of internal and external interfaces
    • Doorstop to link documentation and requirements to code
    • Zephyr solution (originally by Intel) based on Doxygen
    • In Progress: conversion of hypercalls docs to Doxygen format
  • MISRA C
    • MISRA C Working Group established
    • MISRA C Working Group is evaluating MISRA C rules and accepting them into the Xen coding style.
    • C rules officially accepted in Xen
    • cppcheck available to detect violations, see *make cppcheck* and *make cppcheck-html*
    • In Progress: violations reduction and MISRA C rules acceptance
  • Static System Definition
    • Static memory allocation
    • Static heap allocation
    • Static cpupools
    • Done: cpupools
    • In Progress: memory and heap allocation
  • Determinism and interference reduction
    • Interrupt latency analysis in Xen
    • Cache Coloring
    • In Progress: Cache Coloring upstreaming
  • Traceability
    • Trace review comments and patch versions all the way to a commit
    • Status: script prototype available to retrieve all mailing list discussions from a commit id