Xen Project 4.16 Feature List

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Revision as of 14:39, 2 December 2021 by IanJackson (talk | contribs) (Other interesting progress)
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Notable Features

This release has seen the increase in hardware support for both x86 and Arm, together with the addition of other improvements and features:

  • Miscellaneous fixes to the TPM manager software in preparation for TPM 2.0 support.
  • Increased reliance on the PV shim as 32-bit PV guests will only be supported in shim mode going forward. This change reduces the attack surface in the hypervisor.
  • Increased hardware support by allowing Xen to boot on Intel devices that lack a Programmable Interval Timer.
  • Cleanup of legacy components by no longer building QEMU Traditional or PV-Grub by default. Note both projects have upstream Xen support merged now, so it is no longer recommended to use the Xen specific forks.
  • Initial support for guest virtualized Performance Monitor Counters on Arm.
  • Improved support for dom0less mode by allowing the usage on Arm 64bit hardware with EFI firmware.
  • Improved support for Arm 64-bit heterogeneous systems by leveling the CPU features across all to improve big.LITTLE support.

Features and improvements

CI loop (gitlab CI)

  • 32-bit Arm builds.
  • Full system tests for x86.

Ongoing activities

The Xen community has several interesting initiatives, where work is ongoing and is expected to bear fruit in forthcoming releases. Some of the highlights:

Functional Safety

In collaboration with the Zephyr project and the MISRA consortium, the Xen FuSaSpecial Interest Group analyzed MISRA C rules in depth and defined a subset of rules that apply to Xen and will be tackled with the community. The SIG evaluated several static code analyzers to scan the Xen code base for MISRA Cviolations. The team started enhancing the Xen build system with the ability to run open source MISRA C checkers as part of the Xen build, so that for future releases Xen, contributors will be able to easily improve the quality of their patches.

RISC-V Port

RISC-V, an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles, is a free and open ISA enabling hardware designers to design simpler chips with a royalty-free ISA. The Xen community, led by sub-project XCP.ng, is working on a RISC-V Port for Xen. During this release cycle significant work has been ongoing internally in order to get dom0 booting on RISC-V hardware, focusing on introducing the functionality to allow interrupt management, together with other interfaces required for early boot code.

VirtIO

The development of VirtIO support for Arm continued making progress, currently focusing on introducing a mechanism to ease the mapping of memory from remote domains by reporting memory regions of the domain currently unused. Further work has also been done in order to improve the toolstack support to handle VirtIO block devices.

Zephyr RTOS

As a result of collaboration between the Zephyr and Xen projects, starting version 2.7.0, Zephyr RTOS supports some basic Xen specific features allowing it to run on Xen. With further Xen enhancements on review and development: grant tables, XenBus and starting Zephyr as Domain-0, Xen is getting closer to a full implementation of a RTOS-based "thin dom0" targeting Embedded and Safety use cases.